Method ShiftRightLogical_Core
- Namespace
- Zyl.VectorTraits
- Assembly
- VectorTraits.dll
ShiftRightLogical_Core(Vector128<sbyte>, int, Vector128<sbyte>, Vector128<sbyte>)
Core calculation for shifts (unsigned) each element of a vector right by the specified amount. (将向量的每个无符号元素逻辑右移指定量的核心计算). Its arguments are derived from ShiftRightLogical_Args (其参数来源于 ShiftRightLogical_Args).
Mnemonic: rt[i] := value[i] >>> shiftAmount
, shiftAmount &= (T.BitSize-1)
.
[CLSCompliant(false)]
public static Vector128<sbyte> ShiftRightLogical_Core(Vector128<sbyte> value, int shiftAmount, Vector128<sbyte> args0, Vector128<sbyte> args1)
Parameters
value
Vector128<sbyte>The vector whose elements are to be shifted (要移位其元素的向量).
shiftAmount
intThe number of bits by which to shift each element (每个元素的移位位数).
args0
Vector128<sbyte>Arguments 0 (参数0). Derived from ShiftRightLogical_Args .
args1
Vector128<sbyte>Arguments 1 (参数1). Derived from ShiftRightLogical_Args .
Returns
- See Also
ShiftRightLogical_Core(Vector128<byte>, int, Vector128<byte>, Vector128<byte>)
Core calculation for shifts (unsigned) each element of a vector right by the specified amount. (将向量的每个无符号元素逻辑右移指定量的核心计算). Its arguments are derived from ShiftRightLogical_Args (其参数来源于 ShiftRightLogical_Args).
Mnemonic: rt[i] := value[i] >>> shiftAmount
, shiftAmount &= (T.BitSize-1)
.
public static Vector128<byte> ShiftRightLogical_Core(Vector128<byte> value, int shiftAmount, Vector128<byte> args0, Vector128<byte> args1)
Parameters
value
Vector128<byte>The vector whose elements are to be shifted (要移位其元素的向量).
shiftAmount
intThe number of bits by which to shift each element (每个元素的移位位数).
args0
Vector128<byte>Arguments 0 (参数0). Derived from ShiftRightLogical_Args .
args1
Vector128<byte>Arguments 1 (参数1). Derived from ShiftRightLogical_Args .
Returns
- See Also
ShiftRightLogical_Core(Vector128<short>, int, Vector128<short>, Vector128<short>)
Core calculation for shifts (unsigned) each element of a vector right by the specified amount. (将向量的每个无符号元素逻辑右移指定量的核心计算). Its arguments are derived from ShiftRightLogical_Args (其参数来源于 ShiftRightLogical_Args).
Mnemonic: rt[i] := value[i] >>> shiftAmount
, shiftAmount &= (T.BitSize-1)
.
public static Vector128<short> ShiftRightLogical_Core(Vector128<short> value, int shiftAmount, Vector128<short> args0, Vector128<short> args1)
Parameters
value
Vector128<short>The vector whose elements are to be shifted (要移位其元素的向量).
shiftAmount
intThe number of bits by which to shift each element (每个元素的移位位数).
args0
Vector128<short>Arguments 0 (参数0). Derived from ShiftRightLogical_Args .
args1
Vector128<short>Arguments 1 (参数1). Derived from ShiftRightLogical_Args .
Returns
- See Also
ShiftRightLogical_Core(Vector128<ushort>, int, Vector128<ushort>, Vector128<ushort>)
Core calculation for shifts (unsigned) each element of a vector right by the specified amount. (将向量的每个无符号元素逻辑右移指定量的核心计算). Its arguments are derived from ShiftRightLogical_Args (其参数来源于 ShiftRightLogical_Args).
Mnemonic: rt[i] := value[i] >>> shiftAmount
, shiftAmount &= (T.BitSize-1)
.
[CLSCompliant(false)]
public static Vector128<ushort> ShiftRightLogical_Core(Vector128<ushort> value, int shiftAmount, Vector128<ushort> args0, Vector128<ushort> args1)
Parameters
value
Vector128<ushort>The vector whose elements are to be shifted (要移位其元素的向量).
shiftAmount
intThe number of bits by which to shift each element (每个元素的移位位数).
args0
Vector128<ushort>Arguments 0 (参数0). Derived from ShiftRightLogical_Args .
args1
Vector128<ushort>Arguments 1 (参数1). Derived from ShiftRightLogical_Args .
Returns
- See Also
ShiftRightLogical_Core(Vector128<int>, int, Vector128<int>, Vector128<int>)
Core calculation for shifts (unsigned) each element of a vector right by the specified amount. (将向量的每个无符号元素逻辑右移指定量的核心计算). Its arguments are derived from ShiftRightLogical_Args (其参数来源于 ShiftRightLogical_Args).
Mnemonic: rt[i] := value[i] >>> shiftAmount
, shiftAmount &= (T.BitSize-1)
.
public static Vector128<int> ShiftRightLogical_Core(Vector128<int> value, int shiftAmount, Vector128<int> args0, Vector128<int> args1)
Parameters
value
Vector128<int>The vector whose elements are to be shifted (要移位其元素的向量).
shiftAmount
intThe number of bits by which to shift each element (每个元素的移位位数).
args0
Vector128<int>Arguments 0 (参数0). Derived from ShiftRightLogical_Args .
args1
Vector128<int>Arguments 1 (参数1). Derived from ShiftRightLogical_Args .
Returns
- See Also
ShiftRightLogical_Core(Vector128<uint>, int, Vector128<uint>, Vector128<uint>)
Core calculation for shifts (unsigned) each element of a vector right by the specified amount. (将向量的每个无符号元素逻辑右移指定量的核心计算). Its arguments are derived from ShiftRightLogical_Args (其参数来源于 ShiftRightLogical_Args).
Mnemonic: rt[i] := value[i] >>> shiftAmount
, shiftAmount &= (T.BitSize-1)
.
[CLSCompliant(false)]
public static Vector128<uint> ShiftRightLogical_Core(Vector128<uint> value, int shiftAmount, Vector128<uint> args0, Vector128<uint> args1)
Parameters
value
Vector128<uint>The vector whose elements are to be shifted (要移位其元素的向量).
shiftAmount
intThe number of bits by which to shift each element (每个元素的移位位数).
args0
Vector128<uint>Arguments 0 (参数0). Derived from ShiftRightLogical_Args .
args1
Vector128<uint>Arguments 1 (参数1). Derived from ShiftRightLogical_Args .
Returns
- See Also
ShiftRightLogical_Core(Vector128<long>, int, Vector128<long>, Vector128<long>)
Core calculation for shifts (unsigned) each element of a vector right by the specified amount. (将向量的每个无符号元素逻辑右移指定量的核心计算). Its arguments are derived from ShiftRightLogical_Args (其参数来源于 ShiftRightLogical_Args).
Mnemonic: rt[i] := value[i] >>> shiftAmount
, shiftAmount &= (T.BitSize-1)
.
public static Vector128<long> ShiftRightLogical_Core(Vector128<long> value, int shiftAmount, Vector128<long> args0, Vector128<long> args1)
Parameters
value
Vector128<long>The vector whose elements are to be shifted (要移位其元素的向量).
shiftAmount
intThe number of bits by which to shift each element (每个元素的移位位数).
args0
Vector128<long>Arguments 0 (参数0). Derived from ShiftRightLogical_Args .
args1
Vector128<long>Arguments 1 (参数1). Derived from ShiftRightLogical_Args .
Returns
- See Also
ShiftRightLogical_Core(Vector128<ulong>, int, Vector128<ulong>, Vector128<ulong>)
Core calculation for shifts (unsigned) each element of a vector right by the specified amount. (将向量的每个无符号元素逻辑右移指定量的核心计算). Its arguments are derived from ShiftRightLogical_Args (其参数来源于 ShiftRightLogical_Args).
Mnemonic: rt[i] := value[i] >>> shiftAmount
, shiftAmount &= (T.BitSize-1)
.
[CLSCompliant(false)]
public static Vector128<ulong> ShiftRightLogical_Core(Vector128<ulong> value, int shiftAmount, Vector128<ulong> args0, Vector128<ulong> args1)
Parameters
value
Vector128<ulong>The vector whose elements are to be shifted (要移位其元素的向量).
shiftAmount
intThe number of bits by which to shift each element (每个元素的移位位数).
args0
Vector128<ulong>Arguments 0 (参数0). Derived from ShiftRightLogical_Args .
args1
Vector128<ulong>Arguments 1 (参数1). Derived from ShiftRightLogical_Args .
Returns
- See Also